Journal Publications

  1. Arup K. George, Junghyup Lee, Zhi Hui Kong, and Minkyu Je, "A 0.8-V Supply- and Temperature- Insensitive Capacitance-to-Digital Converter in 0.18-μm CMOS," IEEE Sensors Journal, vol. 16, no. 13, pp. 5354–5364, July 2016. (One of the 5 most downloaded Sensors Journal Papers in September 2016)
  2. Camilo Libedinsky, Rosa So, Zhiming Xu, Toe K. Kyar, Duncun Ho, Clement Lim, Louiza Chan, Yuanwei Chua, Lei Yao, Jia Hao Cheong, Junghyup Lee, Kulakarni Vinayak Vishal, Yongxin Guo, Zhi Ning Chen, Lay K. Lim, Peng Li, Lei Liu, Xiaodan Zou, Kai K. Ang, Yuan Gao, Wai Hoe Ng, Boon Siew Han, Keefe Chng, Cuntai Guan, Minkyu Je, Shih-Cheng Yen, "Independent Mobility Achieved Through a Wireless Brain-Machine Interface," Plos One, Nov. 2016.
  3. Kulkarni V. V., Junghyup Lee, Jun Zhou, Chee Keong Ho, Jia Hao Cheong, Weida Toh, Peng Li, Xin Liu, Minkyu Je, " A Reference-Less Injection-Locked Clock-Recovery Scheme for Multilevel-Signaling-Based Wideband BCC Receivers," IEEE Trans. Microwave Theory and Techniques, vol. 62, no. 9, pp. 1856-1866, Aug. 2014.
  4. Chee Keong Ho, Jia Hao Cheong, Junghyup Lee, Kulkarni, V. V., Peng Li, Xin Liu, Minkyu Je, "High Bandwidth Efficiency and Low Power Consumption Walsh Code Implementation Methods for Body Channel Communication," IEEE Trans. Microwave Theory and Techniques, vol. 62, no. 9, pp. 1867-1878, Aug. 2014.
  5. Junghyup Lee and SeongHwan Cho, "A 1.4-μW 24.9-ppm/˚C Current Reference With Process-Insensitive Temperature Compensation in 0.18-μm CMOS," IEEE J. Solid-State Circuits, vol. 47, no. 10, pp. 2527-2533, Oct. 2012.
  6. Youngsoo Shin and Junghyup Lee, "Power analysis of VLSI interconnect with RLC tree models and model reduction," Journal of Circuits, Systems, and Computers, vol. 15, no. 3, pp. 399-408, June. 2006.

Journal under Preparation

  1. Junghyup Lee, Arup K. George and Minkyu Je, "A 1.4V 10.5Mhz Swing-Boosted Differential Relaxation Oscillator with 162.1dBc/Hz FoM and 9.86psrms Period Jitter in 0.18μm CMOS", under preparation for IEEE J. Solid-State Circuits (presented at ISSCC 2016).
  2. Junghyup Lee, Pyoungwon Park, SeongHwan Cho and Minkyu Je, "A 4.7MHz 53μW Fully Differential CMOS Reference Clock Oscillator with -22dB Worst-Case PSNR for Miniaturized SoCs," under preparation for IEEE J. Solid-State Circuits (presented at ISSCC 2015).

Conference Publications

  1. Sehwan Lee, Arup K. George, Taeju Lee, Jun-Uk Chu, Sungmin Han, Ji-Hoon Kim, Minkyu Je and Junghyup Lee, “A 110dB-CMRR 100dB-PSRR Multi-Channel Neural-Recording Amplifier System Using Differentially Regulated Rejection Ratio Enhancement in 0.18μm CMOS,” in IEEE Int. Solid-State Circuits Conference(ISSCC), Feb. 2018, accepted.
  2. Junghyup Lee, Arup K. George, and Minkyu Je, “An Ultra-Low-Noise Differential Relaxation Oscillator based on a Swing-Boosting Scheme,” in Proc. Asia and South Pacific Design Automation Conference (ASP-DAC), Jan. 2018, accepted.
  3. Taeju Lee, Doojin Jang, Yoontae Jung, Hyuntak Jeon, Soonyoung Hong, Sungmin Han, Jun-Uk Chu, Junghyup Lee, and Minkyu Je, “A Neural Recording Amplifier Based on Adaptive SNR Optimization Technique for Long-Term Implantation,” in Proc. IEEE Biomedical Circuits and Systems Conference (BioCAS), Oct. 2017, accepted.
  4. Seungyeob Baik, Arup K. George, Minkyu Je and Junghyup Lee, “A 1 V 2.5 μW Fully-Differential ASK Demodulator with 12.5 pJ/bit FOM for Ultra-Low Power Biomedical Applications,” in Proc. IEEE Int. Midwest Symposium on Circuits and Systems (MWSCAS), Aug. 2017.
  5. Taeju Lee, Junghyup Lee and Minkyu Je, “A Neural Recording IC with Self-Adaptive SNR Optimization for Long-Term Implantation,” in Proc. RF/Analog Circuit Workshop, Sep. 2016, pp. 605-606.
  6. Junghyup Lee, Arup K. George and Minkyu Je, "A 1.4V 10.5Mhz Swing-Boosted Differential Relaxation Oscillator with 162.1dBc/Hz FoM and 9.86psrms Period Jitter in 0.18μm CMOS",IEEE Int. Solid-State Circuits Conference (ISSCC) Feb. 2016, pp.106-107
  7. Junghyup Lee, Pyoungwon Park, SeongHwan Cho and Minkyu Je, "A 4.7MHz 53μW Fully Differential CMOS Reference Clock Oscillator with –22dB Worst-Case PSNR for Miniaturized SoCs," in Proc. IEEE Int. Solid-State Circuits Conference (ISSCC) Feb. 2015, pp.106-107
  8. Junghyup Lee, Vishal Vinayak Kulkarni, Chee Keong Ho, Jia Hao Cheong, Peng Li, Jun Zhou, Wei Da Toh, Xin Zhang, Yuan Gao, Kuang Wei Cheng, Xin Liu, and Minkyu Je, “A 60Mb/s Wideband BCC Transceiver with 150pJ/b RX and 31pJ/b TX for Emerging Wearable Applications,” in Proc. IEEE Int. Solid-State Circuits Conference (ISSCC), Feb. 2014, pp.498-499
  9. Junghyup Lee and SeongHwan Cho, " A 210 nW 29.3 ppm/˚C 0.7 V Voltage Reference with a Temperature Range of -50 to 130 ˚C in 0.13 μm CMOS," in Proc. IEEE Symp. VLSI Circuits (VLSIC), Jun. 2011, pp.278-279
  10. Junghyup Lee and SeongHwan Cho, "A 10 MHz 80 μW 67 ppm/˚C CMOS Reference Clock Oscillator with a Temperature Compensated Feedback Loop in 0.18 μm CMOS," in Proc. IEEE Symp. VLSI Circuits (VLSIC), Jun. 2009, pp.226-227
  11. Kulkarni, V. V.,Junghyup Lee, Xin Liu, Minkyu Je, "A 100 Mb/s 0.36 mW injection locked clock and data recovery circuit for WBAN transceivers," in Proc. IEEE MTT-S Int. Microw. Symp. Workshop,Dec. 2013, pp. 1-3
  12. Sung-Sik Woo,Junghyup Lee and SeongHwan Cho, "A Ring Oscillator-based Temperature Sensor For U-Healthcare in 0.13μm CMOS" in Proc. IEEE Int. SoC Design Conference, 2009, pp. 548-551
  13. Junghyup Lee and SeongHwan Cho, "A 80 μW, 10 MHz CMOS Reference Clock Generator with High Frenquency Stability," Korean Conference on Semiconductors (KCS), Feb. 2009
  14. Joonhee Lee, Kyunglok Kim, Junghyup Lee, Taekwang Jang, SeongHwan Cho, " A 480-MHz to 1-GHz sub-picosecond clock generator with a fast and accurate automatic frequency calibration in 0.13- μm CMOS." in Proc. IEEE Asian Solid-state Circuits Conference (ASSCC), Nov. 2007, pp. 67-70

Patents

  1. Junghyup Lee, Minkyu Je, “Reference Clock Signal Generators and Methods for Generating a Reference Clock Signal,” US Patent No. 20170214392 A1, 27 July 2017.
  2. Taeju Lee, Junghyup Lee, Minkyu Je, “Self-Adaptive Neural Recording Circuit System,” KR Patent No. 10-2017-0021672, 17 Feb. 2017.
  3. Junghyup Lee, Yeseul Lee, Gina Lee, Minkyu Je, “Current Supplying Apparatus Generating Current Using Relationship between Differential Voltage and Resistance,” KR Patent No. 10-2017-0016835, 7 Feb. 2017.
  4. Junghyup Lee, Se Hwan Lee, Minkyu Je, “Power Supplying Apparatus for Neural Activity Recorder Reducing Common-Mode Signal Applied in Electrodes Connected to the Neural Activity Recorder,” KR Patent No. 10-2017-0015060, 2 Feb. 2017.
  5. Junghyup Lee, Arup K. George, Minkyu Je, “Differential Relaxation Oscillator Reducing Effect due to Noise by Using Differential Structure and Swing Booster Technology,” KR Patent No. 10-2017-0014020, 31 Jan. 2017.
  6. Junghyup Lee, Vishal Vinayak Kulkarni, Tao Wang, Jun Zhou, Xin Liu, Minkyu Je, “Receiver for body channel communication and a method of operating a receiver therefrom,” US Patent No. US 9425905 B2, 23 Aug. 2016.
  7. Junghyup Lee and Minkyu Je, "A Fully Differential CMOS Reference Clock Oscillator," SG Patent No. SG 10201405567S, 23 Sep. 2014
  8. Junghyup Lee, Vishal Vinayak Kulkarni, Tao Wang, Jun Zhou, Xin Liu, Minkyu Je, "Receiver for body channel communication and a method of operating a receiver therefrom," US patent No. US20140080430 A 1, 20 Mar. 2014
  9. SeongHwan Cho, Kyunglok Kim, Junghyup Lee, Joonhee Lee, "Automatically calibrating frequency features of a phase locked loop," US patent No. US 7719375 B2, 18 May 2010
  10. SeongHwan Cho and Junghyup Lee, "Circuit and Method of Calibrating an Oscillation Signal by Using Wireless Antenna," KR patent No. 1008719870000, 28 Nov. 2008
  11. SeongHwan Cho and Junghyup Lee, "On-chip Oscillator Capable of Compensation," KR patent No. 1008365300000, 03 Jun. 2008
  12. SeongHwan Cho, Kyunglok Kim, Junghyup Lee, Joonhee Lee, "Phase Locked Loop Having High Speed Open-Loop Automatic Frequency Calibration Circuit," KR patent No. 1007383600000, 05 Jul, 2007
  13. Junghyup Lee and Youngsoo Shin, "Narrow Bus Encoding.Decoding Devices Maintaining Transition Counts," KR patent No. 1006574110000, 07 Dec. 2006
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