Junghyup Lee
Assistant Professor, ICE, DGIST


Main research areas

PVT Insensitive Low-Power Voltage/Current Reference Circuits

  • PVT insensitive on-chip resistors for reference circuits
  • Ultra-low-voltage, low power CMOS voltage/current references
  • Trim-free, low-power CMOS voltage/current references
  • Fully differential voltage/current reference circuits

On-chip Clock Generators

  • Low-power CMOS reference clock oscillators with high frequency stability
  • Fully differential CMOS reference clock oscillators
  • Low-noise relaxation oscillators
  • Low-noise, high frequency MEMS-based oscillators
  • Wireless on-chip calibration techniques for high precision oscillators

Low-Cost, Low-Power Sensing Systems

  • Ultra-low-power temperature sensors
  • Supply-and temperature-insensitive capacitive sensor interfaces
  • Digitally synthesizable temperature sensors
  • PVT insensitive, high performance interfaces for capacitive sensor arrays

Highly Energy Efficient Wireless Transceivers

  • Wideband WBAN transceivers using the human body channel
  • In-body channel communication technologies

Professional experience

Feb. 2016 ~ Present
Daegu, Korea

Assistant Professor, ICE, DGIST

Nov. 2011 ~ Feb. 2016
Singapore, Singapore

Scientist, Institute of Microelectronics, A*STAR

  • Leader of the research project developing an ASIC for 3D capacitive sensor arrays for circular tumor cell detection
  • Leader of the industry project developing an ASIC for hight precision MEMS-based accelerometers and gyroscopes
  • Leader of the research project developing highly energy efficient wideband wireless transceivers for a body area network
  • Leader of the industry project developing an ASIC for low-power and low-noise MEMS oscillators
  • Participated in the research project developing a wireless brain-recording system
  • Ph.D. thesis advisor for a research project developing process, voltage and temperature (PVT) insensitive capacitive and temperature sensors
Jan. 2006 ~ Sep. 2011
Daejeon, Korea

Research Assistant,
Communication Circuits and System Laboratory, KAIST

  • Developed low-power CMOS reference clock oscillators for biomedical devices and various sensors
  • Developed an ultra low voltage and low power voltage reference with a wide temperature range
  • Developed a low power current reference with process insensitive temperature compensation
  • Developed an all-digital frequency locked loop for oscillators robust against process variation
Aug. 2004 ~ Dec. 2006
Daejeon, Korea

Research Assistant,
VLSI Design Technology Laboratory, KAIST

  • Developed a compact yet highly accurate power estimation method based on model reduction techniques
  • Created a new series bus coding scheme for VLSI systems with high complexity
Jul. 2000 ~ Aug. 2000
Suwon, Korea

Internship,
SAMSUNG Electronics Ins.

Honors and awards

Best Paper Award, 17th RF/Analog Circuit Workshop, 2017, for a paper entitled "An Implantable Multichannel Neural Recording and Stimulation System for Bidirectional Peripheral Nerve Interface," Sep. 2017.

Best Paper Award, 16th RF/Analog Circuit Workshop, 2016, for a paper entitled "A Neural Recording IC with Self-Adaptive SNR Optimization for Long-Term Implantation," Sep. 2016.

Nominated for Singapore Young Scientist Awards 2015, Singapore National Academy of Science (SNAS).

Outstanding Paper Award, IC Design Education Center (IDEC), 2011, for a paper entitled "A 210 nW 29.3 ppm/°C 0.7 V Voltage Reference with a Temperature Range of -50 to 130°C in 0.13 μm CMOS," Oct. 2011.

Best Design Award, 16th Korean Conference on Semiconductor (KCS), Feb. 2009.

Outstanding Paper Award, IC Design Education Center (IDEC), 2009, for a paper entitled "A 10 MHz 80 μW 67 ppm/°C CMOS Reference Clock Oscillator with a Temperature Compensated Feedback Loop in 0.18 m CMOS," Oct. 2009.

Best Design Award, SAMSUNG Electronics Inc., Aug. 2000.

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